RPI LCT4V3 stack with RPI LCT8 application example

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We will showcase an application example of stacking together a RPI_LCT4V3 with a RPI_LCT8.

Mechanical considerations

The use of screw terminal connectors on RPI_LCT4V3 and RPI_LCT8 makes stacking challenging.

We are proposing here a solution using free plug connectors on the master board. These allow access to the bottom board connector and clearance to access the top board.

This is a solution for 2 boards stack. One master plus one slave. There is no options for stacking 3 boards or more at the moment.

Master RPI_LCT4V3

The master board RPI_LCT4V3 with the free plug connector is shown below:


Slave RPI_CT8

The slave board RPI_CT8 with standard screw terminals is shown below.

2 boards stack

The combined stacking is shown below. Offering 3 Voltage ports and 12 Current ports.

Configuration

For configuration we measure four 3-phase systems being supplied by the same line. The CT port will be associated as follow. 

CT1 to CT4 on Master -> Phase 1 against V1
CT1 to CT4 on Slave  -> Phase 2 against V2
CT5 to CT8 on Slave  -> Phase 3 against V3

We generate the configuration using the web tool as below. 

[main]
format = 3
nodeid = 11
polling = 5000
vest = 240.0
xpFREQ = 50
Ncycle = 20
kcal = 83.33 83.33 83.33 83.33 83.33 83.33 83.33 83.33 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 545.0 545.0 545.0 1 83.33 83.33 83.33 83.33 
phasecal = 0
Nnode = 12
Nchan = 15
HWSCT = 7 7 3 6 6 2 5 5 1 4 4 0 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
HWMCPSCT = 10 6 6 10 6 6 10 6 6 10 6 6 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
HWVOL = 2 1 0 2 1 0 2 1 0 2 1 0 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
HWMCPVOL = 10 10 10 10 10 10 10 10 10 10 10 10 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
CHTYPE = 1 1 1 1 1 1 1 1 1 1 1 1 3 3 3 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
CHID = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
debug = 0

Running the configuration using debug = 1 report a full scan interval of 4870ms. Polling of 5000ms is therefore well adequate. This could be reduced if opting for a number of cycles lower than the default 20.

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